TPUs vs. GPUs and why Google is positioned to win AI race in the long term (www.uncoveralpha.com)

Google’s TPU story is no longer just an anecdote about clever hardware—TPUs have evolved into a purpose-built AI platform that Google is using to gain a lasting advantage. Originating in 2013 to avoid skyrocketing data-center costs for neural workloads, TPUs use systolic arrays to stream weights through a matrix of multipliers, drastically cutting memory reads/writes and boosting operations-per-joule. The latest TPUv7 (Ironwood) reportedly delivers ~4,614 TFLOPS (BF16), 192 GB HBM and ~7,370 GB/s memory bandwidth (vs TPUv5p’s 459 TFLOPS, 96 GB, 2,765 GB/s), plus a faster software stack, SparseCore for large embeddings, and improved inter-chip interconnect (ICI ~1.2 TB/s). Google also couples TPUs with optical circuit switching and a 3D torus network for scale-out TPU Pods. That combination of specialized silicon, network architecture, and software tooling makes TPUs far more cost- and energy-efficient for many inference and certain training workloads—users and ex-Google engineers report up to ~1.4x better cost-performance or much larger gains in specific cases, and Google claims TPUv7 is ~100% better performance-per-watt than v6e. Limitations remain (less generality than GPUs, porting effort), but because Google controls chip design, compiler/runtime and cloud scale—and may already use Ironwood for Gemini 3—TPUs are a strategic asset that could shift workloads toward Google Cloud and reshape chip competition as ASICs increasingly outpace general-purpose GPUs in prioritized AI tasks.