🤖 AI Summary
At an industry demo night, an engineer showcased a prototyping setup built on a Tile Carrier Card that combines a Raspberry Pi Compute Module 5 and an Embedded System Tile carrying an AMD Spartan‑7 FPGA. The Pi runs a face‑detection application; when it detects a face it sends a command over a UART link to the FPGA, which drives a simple robot arm attached via Pmod connectors to perform a wave. The FPGA handles time‑critical PWM generation (six joint channels at 50 Hz) and command processing, because the CM5 provides only four hardware PWMs and software PWM on the Pi is too jittery for reliable robotics.
Technically the design reuses a UART‑to‑AXI framework: an AXI Stream UART module converts serial bytes to AXI transactions, an AXI protocol FSM packs those into AXI‑Lite read/write operations, and a register bank exposes six joint registers mapped to PWM generators. The VHDL RTL includes metastability protection on RX, TX/RX FSMs, parity/check logic and a parameterizable UART (example generics: 100 MHz clock, 115200 baud). The demo highlights the practical hybrid approach of offloading deterministic motor control and advanced drive techniques (e.g., space‑vector modulation) to FPGAs while keeping high‑level vision and orchestration on a Linux SBC — a useful pattern for robotics and AI/ML prototyping.
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