Intel Compute Runtime 25.40.35563.4 Brings More Panther Lake Changes (www.phoronix.com)

Intel released Compute Runtime 25.40.35563.4, a monthly update that tightens performance and adds several low-level preparations for the upcoming Panther Lake (Xe3) integrated graphics. The patch set focuses on faster data movement and lower latency across the stack: enabling staging copies and low-latency hints in Level Zero, turning on Ultra Low Latency Scheduling (ULLS) for the copy engine on Panther Lake, and disabling TLB invalidation for Panther Lake in the Xe kernel driver — all changes aimed at reducing overhead for memory transfers and kernel dispatches. For developers and ML workloads this matters because memory and copy inefficiencies are often the bottleneck for training and inference on integrated GPUs. The runtime also broadens Unified Shared Memory (USM) support — enabling USM reuse on Xe2 hardware and USM pooling on Battlemage — improving allocation efficiency and reducing fragmentation for repeated buffer use. Other updates include support for Wilcat Lake A1 silicon and a new CMake option, NEO_ULTS_ENABLE_OPTIMIZATIONS, to toggle compiler optimizations in unit-test builds. The release is available on Intel’s GitHub and signals continued low-level tuning ahead of Panther Lake’s broader rollout, promising better throughput and lower latency for AI/ML workloads on Intel GPUs.