Nvidia Reveals Vera Rubin Superchip (www.tomshardware.com)

At GTC 2025 Nvidia unveiled the Vera Rubin Superchip: a thick, motherboard-like accelerator board that pairs two next‑generation Rubin GPUs with an 88‑core Vera CPU and on‑board memory. Nvidia says the system delivers about 100 PetaFLOPS of FP4 AI performance and expects the design to enter production next year, with units likely shipping in late 2026 and broader deployment by early 2027. Physical photos and markings show Rubin GPUs packaged in Taiwan (week 38, 2025) and the Vera CPU exhibiting internal seams, indicating a multi‑chiplet CPU. Each Rubin GPU appears to be built from two compute chiplets plus one or two I/O chiplets and eight HBM4 stacks; Vera sits beside SOCAMM2 LPDDR modules and a distinct CPU I/O chiplet, while mysterious green features near CPU I/O pads hint at external chiplet-enabled interfaces. Technically, the board emphasizes tight CPU–GPU integration and chiplet modularity, plus rack‑scale connectivity: NVLink backplane connectors replace conventional cabled slots, and bottom‑edge connectors are provisioned for power, PCIe, CXL, etc. For the AI/HPC community this signals continued investment in low‑precision formats (FP4) for big throughput gains, persistent reliance on HBM for GPU memory bandwidth, and wider adoption of multi‑chiplet system designs that optimize I/O and scaling inside datacenter blades. The Vera Rubin layout also suggests Nvidia is standardizing a blade‑style form factor for future supercomputing and large‑model deployments.