Data Centers Boost Voltage for Higher Efficiency (semiengineering.com)

🤖 AI Summary
Data-center power architecture is shifting from per-rack AC-to-DC trays to centralized, high-voltage DC (HVDC) delivered from edge or “sidecar” racks — a change modeled on EV charging systems. Instead of converting AC at every rack to ~48 VDC and then stepping down on each board with many DrMOS stages (today’s GPU boards can use dozens to over a hundred DrMOS), buildings or rows will convert AC once to higher DC (400–800 V) and distribute that to racks, where local DC-DC converters drop voltage close to the chips. NVIDIA has already signaled this direction with its Kyber rack (800 V) planned for 2027, and vendors expect rollout over the next few years for AI/HPC sites that need extreme power density. Technically, higher distribution voltage lowers current for the same power (P=VI), cutting I^2R losses, reducing copper mass (current designs may use ~200 kg copper per rack), and easing wiring constraints (DC uses full conductor rather than AC skin-depth-limited edges). It also shifts requirements: more robust, high-voltage power FETs and SiC devices, precise power-integrity and thermal co‑simulation to avoid RDSon hotspots and thermal runaway, and redundant centralized PSUs to mitigate larger failure domains. The change is targeted at high-power AI/HPC facilities — legacy data centers and lower-power workloads can remain on existing 48 V architectures.
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