Tsetlin Machine MNIST classifier running on a Tang Nano 9K FPGA board (github.com)

A novel implementation of a 200-clause Tsetlin Machine MNIST digit classifier has been demonstrated running on the Tang Nano 9K FPGA board, utilizing the board's built-in USB-serial bridge for a streamlined UART communication interface. This design stands out for its simplicity and efficiency, starting inference automatically upon receiving the 98-byte image data without needing a separate trigger. The system's architecture is composed of hand-designed Verilog and C code, focusing on a hotstate engine that processes digit classification rapidly and effectively. The significance of this development lies in its potential impact on real-time FPGA applications in AI, showcasing how Tsetlin Machines can be efficiently deployed in hardware environments. By achieving accurate classification results with minimal resource usage—only 28% of the available LUTs and 9% of DFFs—it reveals the promise of energy-efficient AI implementations. Furthermore, the design passes rigorous batch testing, confirming its reliability and accuracy in predicting MNIST digits, making it a pivotal reference for developing compact and efficient machine learning models on FPGA platforms.