Charting RISC-V's Future in HPC (www.hpcwire.com)

Meta has announced plans to manufacture a new custom AI chip starting in September, signaling a pivotal development in the ongoing evolution of RISC-V architecture, which currently sees over 30 billion cores deployed globally. At the ISC 2026 conference, experts highlighted the increasing maturity of the RISC-V ecosystem, predicting it could capture a significant market share in high-performance computing (HPC) within the next few years. RISC-V allows for extreme hardware and software customization, unlike the closed architecture of x86 or the vendor-controlled Arm systems, fostering greater innovation and competitive dynamics. A key player in this shift is Inspire Semiconductor, which plans to release the Thunderbird, a PCI board equipped with 6,144 RISC-V cores, capable of delivering 24 teraflops of FP64 performance. This performance leap is set against a backdrop of traditional GPU limitations, as Nvidia transitions focus toward AI tasks rather than high-precision computing. With RISC-V’s community-driven approach and open standards, there's hope for significant advancements in energy efficiency and performance in HPC. However, experts caution that challenges remain, particularly in porting existing scientific codes to RISC-V, but with continued development, RISC-V systems may soon prove competitive with traditional architectures within three years.