Qualcomm's new High Bandwidth Compute looks to tackle costs of High Bandwidth Memory (www.techradar.com)

Qualcomm has unveiled its new High Bandwidth Compute (HBC) memory architecture, a hybrid design that stacks LPDDR memory in a 3D configuration to potentially replace current High Bandwidth Memory (HBM4). This innovative architecture allows for substantial memory capacity—up to 768GB—and an impressive theoretical bandwidth of 133TB/s, significantly surpassing HBM4's capabilities of approximately 3.3TB/s per stack. By integrating memory with compute capabilities in a near-memory architecture, Qualcomm aims to enhance efficiency, boasting potential energy savings of 6x bandwidth per watt for large batch sizes and up to 200x for mixed inference workloads. This development is particularly significant for the AI/ML community, as it represents Qualcomm's strategic pivot towards the data center market, leveraging its extensive experience with power-efficient chips. Partnerships with major players like Microsoft and Meta indicate strong industry interest in HBC's promise of high performance while addressing environmental concerns associated with AI data centers. However, while Qualcomm's claims are impressive, they lack independent validation, positioning HBC as a compelling but yet to be fully verified alternative in the competitive landscape, which includes rival solutions such as High Bandwidth Flash from Samsung and others. The HBC architecture is expected to debut alongside Qualcomm's next-generation AI inference accelerator, the AI250, in mid-2027.