Xezim – a Rust-based SystemVerilog simulator (github.com)

Xezim, a new lightweight SystemVerilog simulator developed in Rust, aims to simplify and modernize electronic design automation (EDA) by exploring the potential of AI-assisted workflows in chip design. Previously known as namesisSIM, xezim retains its functionality while offering a robust foundation for researchers and engineers alike. This initiative seeks to determine whether a small team or even a single engineer, with the help of AI, can successfully build core EDA tools—typically reliant on large engineering teams and extensive development time. Key features of xezim include SystemVerilog module parsing, signal representation, and combinational and sequential logic simulation. The simulator is incrementally developing its capabilities, with current offerings such as a bytecode interpreter, a test execution framework, and various waveform trace dump options. As Rust's memory safety and concurrency make it a strong candidate for large-scale EDA infrastructure, xezim's ultimate goal is to facilitate rapid prototyping and cloud-scale simulations, potentially revolutionizing how chip design tools are built and deployed. With these developments, xezim positions itself as a significant contender in the growing landscape of open-source EDA solutions.