Euclyd – Startup to Take on AI Inference with Sip, Custom Memory (www.eetimes.com)

European startup Euclyd emerged from stealth with Craftwerk, a huge many‑chiplet system-in-package (SiP) for large‑scale AI inference that aims to cut power and cost per token. Craftwerk packs 16,384 SIMD processors (up to 8 PFLOPS FP16 / 32 PFLOPS FP4), uses an unusually large ~100 × 100 mm silicon interposer with 2.5D/3D integration, and pairs compute chiplets with a custom Ultra Bandwidth Memory (UBM) offering about 1 TB of DRAM and ~8,000 TB/s bandwidth in a single SiP. The company is building its own ISA and toolchain (no Arm or RISC‑V reuse) to keep the device fully programmable for transformers and other emerging model classes, and claims single‑SiP throughput of ~20,000 tokens/sec on Llama4‑Maverick (400B) and a 32‑Craftwerk rack delivering millions of tokens/sec at rack scale. The significance is twofold: architecturally, Euclyd targets the painful tradeoffs of capacity vs. bandwidth that force model sharding across many chips today, promising denser on‑die model residency and far less interconnect overhead; commercially, lower power per token could democratize inference beyond hyperscalers. Technical risks remain—fabricating giant interposers, validating custom memory at extreme bandwidths, and scaling software/hardware co‑design—but seed backing from high‑profile investors and an Eindhoven base with strong chip talent give the project momentum. If realized, Craftwerk would be a direct competitive challenge to GPU and wafer‑scale offerings from Nvidia and Cerebras for datacenter inference.